# Copyright (C) 2017  Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Intel Program License 
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel FPGA IP License Agreement, or other applicable license
# agreement, including, without limitation, that your use is for
# the sole purpose of programming logic devices manufactured by
# Intel and sold by Intel or its authorized distributors.  Please
# refer to the applicable agreement for further details.

# Quartus Prime Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition
# File: D:\FPGA_PROJECT\fsktiaozhi\modulate_2FSK.tcl
# Generated on: Fri Nov 19 07:12:31 2021

package require ::quartus::project

set_loction_assignment PIN_E1 -to clk
set_loction_assignment PIN_N13 -to rst
set_loction_assignment PIN_E1 -to x
set_loction_assignment PIN_E1 -to y
